Sourjya Basu

• Built a from-scratch custom LCD driver stack for the Nokia 5110 LCD Module (PCD8544 controller) on Espressif Systems ESP32 using ESP-IDF, implementing GPIO bit-banged serial transport, CE/DC/RST sequencing, and PCD8544 48×84 framebuffer page writes

• Implemented a framebuffer flush pipeline with scanline-to 8px-page conversion and full-frame serialized transfer into display controller RAM.

• Developed an integer-only raster engine (Bresenham line + midpoint circle) with incremental decision logic and linked-list based coordinate staging for deferred framebuffer rendering.

• Built an 8×8 bitmap font renderer with ASCII mapping, and direct framebuffer glyph composition.

• Designed a text layout + marquee system supporting incremental framebuffer shifting for scrolling output.

• Created a graphics driver API for pixel, line, rectangle, triangle, circle and batch framebuffer composition before hardware flush.

• Integrated FreeRTOS for timed execution and deterministic display refresh scheduling.

CloudVPN+ is our (me and my team 4 people in total) final year project aimed at reducing the cost of VPN providers. Research Paper in progress.

• Designed and implemented a custom TCP tunnelling and multiplexing protocol to route multiple logical streams over a single persistent connection, reducing connection overhead and improving efficiency.

• Built from scratch using raw sockets for fine-grained control over protocol design, data flow, and connection management.

• Developed custom binary framing and stream identification for packet routing and isolation between streams.

• Implemented full-duplex communication between client, server, and dynamic endpoints.

• Designed a multithreaded architecture using producer consumer queues for concurrent data transport.

• Handled TCP stream fragmentation and reassembly using custom logic for reliable data transmission.

• Integrated browser-based traffic routing via PAC scripts with local client-server architecture.

Built an emulator around ATtiny13 (AVR based). It reads a .bin firmware file and runs it.

• Built an instruction-level AVR (8-bit) microcontroller emulator in Python capable of executing compiled AVR machine code using a fetch–decode–execute architecture.

• Designed a software CPU model implementing a Program Counter (PC), 32 general-purpose registers, Stack Pointer (SPL), Status Register (SREG), RAM, and memory-mapped I/O.

• Developed a mask-and-pattern based instruction decoder, enabling efficient identification and dispatch of AVR opcodes to their corresponding instruction handlers.

• Implemented execution support for multiple AVR instructions including LDI, OUT, IN, RJMP, RCALL, RET, EOR, SBI, SUBI, SBCI, SBIW, BRNE, and NOP, accurately reproducing AVR instruction semantics.

• Simulated AVR stack operations, including function calls and returns, by implementing PUSH/POP mechanisms and return address management.

• Implemented memory-mapped I/O emulation, allowing software peripherals to react dynamically to register writes through callback based handlers.

• Recreated AVR Status Register (SREG) behavior by computing Carry, Zero, Negative, Overflow, Sign, Half-Carry, and other processor flags according to AVR arithmetic specifications.

• Implemented relative branching and subroutine control flow, including signed offset decoding for branch and jump instructions.

• Engineered a modular emulator architecture separating CPU state, RAM, I/O subsystem, instruction metadata, and execution logic, improving maintainability and extensibility.

• Executed raw AVR binaries directly by reading machine code from binary files and interpreting instructions in real time.